From 3ce50709aac9199e4d9fa8f1c42af29776eced64 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?St=C3=A9phane=20Marchesin?= Date: Tue, 17 Apr 2012 18:16:18 -0700 Subject: [PATCH 1/2] i965: Allow the case where multiple flush types are enqueued. This happens when the miptree is allocated with intel_miptree_alloc_hiz which adds NEED_HIZ_RESOLVE and then NEED_DEPTH_RESOLVE is added to it. --- src/mesa/drivers/dri/intel/intel_resolve_map.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/intel/intel_resolve_map.c b/src/mesa/drivers/dri/intel/intel_resolve_map.c index 04b5c94..cb4b838 100644 --- a/src/mesa/drivers/dri/intel/intel_resolve_map.c +++ b/src/mesa/drivers/dri/intel/intel_resolve_map.c @@ -42,8 +42,8 @@ intel_resolve_map_set(struct intel_resolve_map *head, struct intel_resolve_map *prev = head; while (*tail) { - if ((*tail)->level == level && (*tail)->layer == layer) { - (*tail)->need = need; + if ((*tail)->level == level && (*tail)->layer == layer + && (*tail)->need == need ) { return; } prev = *tail;