BDEPEND=sys-devel/bison sys-devel/flex virtual/pkgconfig || ( dev-lang/python:3.10 ) test? ( sci-electronics/abc sci-electronics/iverilog )
DEFINED_PHASES=configure setup
DEPEND=tcl? ( dev-lang/tcl:= ) libffi? ( dev-libs/libffi:= ) readline? ( sys-libs/readline:= ) libedit? ( dev-libs/libedit:= ) zlib? ( sys-libs/zlib:= )
DESCRIPTION=Framework for Verilog RTL synthesis
EAPI=7
HOMEPAGE=https://yosyshq.net/yosys/
IUSE=tcl libffi readline libedit zlib test
KEYWORDS=~amd64
LICENSE=ISC
RDEPEND=sci-electronics/abc
REQUIRED_USE=?? ( readline libedit )
RESTRICT=!test? ( test )
SLOT=0
SRC_URI=https://github.com/YosysHQ/yosys/archive/refs/tags/yosys-0.19.tar.gz
_eclasses_=eapi8-dosym	5ac4857ad078256d939c44f7c64197a9	multilib	b2a329026f2e404e9e371097dda47f96	multiprocessing	1e32df7deee68372153dca65f4a7c21f	python-any-r1	f7b9a2fa38c69a9c2a7ad8fc9283ccf7	python-utils-r1	2fee95c11e5f883024588d4837db6802	toolchain-funcs	d3d42b22a610ce81c267b644bcec9b87
_md5_=7d35a81cdc20b75aad5c1e18ca66c784