DEFINED_PHASES=compile install unpack
DEPEND=dev-vcs/git media-gfx/xdot dev-libs/boost sys-devel/clang
DESCRIPTION=framework for Verilog RTL synthesis
EAPI=8
HOMEPAGE=http://www.clifford.at/yosys/
KEYWORDS=amd64
LICENSE=ISC
SLOT=0
SRC_URI=https://github.com/YosysHQ/yosys/archive/yosys-0.41.tar.gz https://github.com/YosysHQ/abc/archive/237d81397fcc85dd3894bf1a449d2955cd3df02d.tar.gz -> abc-237d81397fcc85dd3894bf1a449d2955cd3df02d.tar.gz
_md5_=21e950debb2ebffee114669546da1711